symbol v ds v gs i dm i ar e ar t j , t stg symbol typ max 19.6 25 50 60 r jc 1 1.5 2.1 w t a =70c 1.3 w junction and storage temperature range a p d c 100 50 -55 to 175 t c =100c i d continuous draincurrent b, h maximum units parameter t c =25c t c =100c 30 maximum junction-to-ambient a steady-state 6565 80 avalanche current c 38 power dissipation a t a =25c p dsm c/w absolute maximum ratings t c =25c unless otherwise noted vv 12 pulsed drain current c power dissipation b t c =25c gate-source voltage drain-source voltagemaximum junction-to-case d steady-state c/w thermal characteristicsparameter units maximum junction-to-ambient a t 10s r ja c/w a repetitive avalanche energy l=0.3mh c 217 mj a t a =70c 12 continuous draincurrent a t a =25c i dsm 16 AOL1712n-channel enhancement mode field effect transistor features v ds (v) = 30v i d =65a (v gs = 10v) r ds(on) < 4.2m (v gs = 10v) r ds(on) < 5.5m (v gs = 4.5v) uis tested rg,ciss,coss,crss tested general description srfet tm AOL1712 uses advanced trench technology with a monolithically integrated schottkydiode to provide excellent r ds(on) ,and low gate charge. this device is suitable for use as a low sidefet in smps, load switching and general purpose applications. -rohs compliant -halogen and antimony free green device* ultra so-8 tm top view bottom tabconnected to drain s g d d s g srfet tm s oft r ecovery mos fet : integrated schottky diode srfet tm alpha & omega semiconductor, ltd. www.aosmd.com
AOL1712 symbol min typ max units bv dss 30 v v ds =30v, v gs =0v 0.1 t j =125c 20 i gss 100 na v gs(th) gate threshold voltage 1.4 1.8 2.5 v i d(on) 80 a 3.5 4.2 t j =125c 5.5 6.6 4.4 5.5 g fs 90 s v sd 0.36 0.5 v i s 65 a c iss 3940 5120 pf c oss 590 pf c rss 255 pf r g 0.72 1.1 q g (10v) 73 95 nc q g (4.5v) 35 nc q gs 10.4 nc q gd 12.4 nc t d(on) 9.8 ns t r 8.4 ns t d(off) 45 ns t f 10 ns t rr 36 43 ns q rr 32 nc this product has been designed and qualified for the consumer market. applications or uses as critical components in life support devices or systems are not authorized. aos does not assume any liability arising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. gate source charge gate resistance v gs =0v, v ds =0v, f=1mhz turn-off delaytime v gs =10v, v ds =15v, r l =0.75 , r gen =3 turn-off fall time turn-on delaytime v gs =4.5v, i d =20a i s =1a,v gs =0v v ds =5v, i d =20a turn-on rise time total gate charge v gs =10v, v ds =15v, i d =20a gate drain charge v gs =0v, v ds =15v, f=1mhz switching parameters total gate charge m maximum body-diode + schottky diode continuous current h input capacitanceoutput capacitance dynamic parameters r ds(on) static drain-source on-resistanceforward transconductance diode forward voltage v ds =v gs i d =250 a electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions i dss zero gate voltage drain current ma v ds =0v, v gs = 12v gate-body leakage currentbody diode reverse recovery time body diode reverse recovery charge i f =20a, di/dt=300a/ s drain-source breakdown voltageon state drain current i d =250 a, v gs =0v v gs =10v, v ds =5v v gs =10v, i d =20a reverse transfer capacitance i f =20a, di/dt=300a/ s a: the value of r ja is measured with the device in a still air environment with t a =25c. the power dissipation p dsm and current rating i dsm are based on t j(max) =150c, using steady state junction-to-ambient thermal resistance. b. the power dissipation p d is based on t j(max) =175c, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used.c: repetitive rating, pulse width limited by junction temperature t j(max) =175c. d. the r ja is the sum of the thermal impedence from junction to case r jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300us pulses, duty cycle 0.5% max.f. these curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of t j(max) =175c. the soa curve provides a single pulse rating. g. these tests are performed with the device mounted on 1 in 2 fr-4 board with 2oz. copper, in a still air environment with t a =25c. h. the maximum current rating is limited by bond-wires.* this device is guaranteed green after date code 8p11 (june 1 st 2008) rev3: july. 2008 alpha & omega semiconductor, ltd. www.aosmd.com
AOL1712 typical electrical and thermal characteristics 0 20 40 60 80 0 0.5 1 1.5 2 2.5 3 v ds (volts) figure 1: on-region characteristics i d (a) 3.5v v gs =3.0v 10v 4.5v 0 20 40 60 80 100 1 1.5 2 2.5 3 3.5 4 v gs (volts) figure 2: transfer characteristics i d (a) 3 3.5 4 4.5 5 0 5 10 15 20 25 30 i d (a) figure 3: on-resistance vs. drain current and gate voltage r ds(on) (m ? ) 0.001 0.01 0.1 1 10 100 0.0 0.2 0.4 0.6 0.8 1.0 v sd (volts) figure 6: body-diode characteristics i s (a) 25c 125c 0.7 0.9 1.1 1.3 1.5 1.7 1.9 -40 -15 10 35 60 85 110 135 160 185 temperature (c) figure 4: on-resistance vs. junction temperature normalized on-resistance i d =20a v gs =10v v gs =4.5v 2 4 6 8 10 12 2 4 6 8 10 v gs (volts) figure 5: on-resistance vs. gate-source voltage r ds(on) (m ? ) 25c 125c v ds =5v v gs =4.5v v gs =10v i d =20a 25c 125c alpha & omega semiconductor, ltd. www.aosmd.com
AOL1712 typical electrical and thermal characteristics 1.0 10.0 100.0 0.1 1 10 100 v ds (volts) i d (amps) figure 9: maximum forward biased safe operating area (note f) 100 s 10ms 1ms dc r ds(on) limited t j(max) =175c t c =25c 100ms 0 2 4 6 8 10 0 10 20 30 40 50 60 70 80 q g (nc) figure 7: gate-charge characteristics v gs (volts) 0 1000 2000 3000 4000 5000 6000 0 5 10 15 20 25 30 v ds (volts) figure 8: capacitance characteristics capacitance (nf) c iss 10 100 1000 10000 0.0001 0.001 0.01 0.1 1 pulse width (s) figure 10: single pulse power rating junction-to- case (note f) power (w) 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 pulse width (s) figure 11: normalized maximum transient thermal impedance (note f) z ? jc normalized transient thermal resistance c oss c rss v ds =15v i d =20a single pulse d=t on /t t j,pk =t c +p dm .z jc .r jc r jc =1.5c/w t on t p d in descending orderd=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse t j(max) =175c t c =25c alpha & omega semiconductor, ltd. www.aosmd.com
AOL1712 typical electrical and thermal characteristics 20 40 60 80 100 1.0e-06 1.0e-05 1.0e-04 1.0e-03 time in avalanche, t a (s) figure 12: single pulse avalanche capability i d (a), peak avalanche current 0 20 40 60 80 100 120 0 25 50 75 100 125 150 175 t case (c) figure 13: power de-rating (note b) power dissipation (w) t c =25c 0 20 40 60 80 0 25 50 75 100 125 150 175 t case (c) figure 14: current de-rating (note b) current rating i d (a) 0 20 40 60 80 100 0.001 0.01 0.1 1 10 100 1000 pulse width (s) figure15: single pulse power rating junction-to- ambient (note g) power (w) 0.001 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse width (s) figure 16: normalized maximum transient thermal impedance (note g) z ? ja normalized transient thermal resistance d=t on /t t j,pk =t a +p dm .z ja .r ja r ja =60c/w t on t p d in descending orderd=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse single pulse d=t on /t t j,pk =t c +p dm .z jc .r jc r ja =60c/w t j(max ) =150c t a =25c alpha & omega semiconductor, ltd. www.aosmd.com
AOL1712 vdd vgs id vgs rg dut - + vdc l vgs vds id vgs bv i unclamped inductive switching (uis) test circuit & waveforms ig vgs - + vdc dut l vds vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar dss 2 e = 1/2 li di/dt i rm rr vdd vdd q = - idt t rr ar ar - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off alpha & omega semiconductor, ltd. www.aosmd.com
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